Embedded Hardware Development and PCB Design

Schematic capture, multilayer PCB layout, RF front ends and bring-up, through design for manufacture.

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Context

Embedded hardware development starts with a product that has to exist as a physical board, on a schedule that is already real. Sometimes there is a working breadboard and no path to something a contract manufacturer will build. Sometimes there is an existing design that draws more current than the budget allows, will not close a radio link, or costs too much per unit for the business case to survive. Sometimes the board exists and nobody documented it, and the first honest deliverable is an accurate schematic recovered from the hardware itself. What all of that needs is an engineer who can own the board end to end: schematic, layout, bring-up, debug, and a bill of materials that holds up in production rather than one that only works on paper. The firmware that runs on it is covered on Firmware and Embedded Linux, and the energy budget it has to live inside is covered on Low Power and Solar.

Scope

What this covers

  • 01End to end embedded hardware development in Altium Designer: schematic capture, multilayer PCB design and layout, and board-level troubleshooting.
  • 02Analog and digital circuit design: power paths, signal conditioning, level translation, and analog front ends for sensors including gas sensors.
  • 03Sensor selection, integration and calibration.
  • 04RF front-end design, including controlled-impedance trace routing and antenna impedance matching validated on a vector network analyzer for S-parameters, return loss and VSWR.
  • 05Combined GNSS L1 and LTE front ends sharing one RF path, with coexistence resolved at design time rather than discovered at bring-up.
  • 06Board-level radio integration across BLE, Wi-Fi, LoRa, 433 MHz sub-GHz, NFC, and LTE-M and NB-IoT cellular.
  • 07High-speed layout: controlled-impedance stackups, trace-length matching and crosstalk mitigation.
  • 08MCU selection and architecture across Nordic nRF51, nRF52, nRF52840 and nRF9160, Cypress PSoC 4 and PSoC 5LP with their programmable analog and digital fabric, ARM Cortex-M0, M3, M4 and M33 parts, and Microchip PIC.
  • 09Register-level peripheral and DMA configuration where a vendor abstraction layer is too slow or too coarse for the timing.
  • 10Energy hardware at board level: battery selection, charge control, fuel gauging and solar harvesting front ends.
  • 11Reverse engineering an undocumented board back to an accurate schematic, and failure analysis on hardware somebody else designed.
  • 12Mechanical prototyping in house: SolidWorks, 3D printed enclosures and mounts, on the same iteration loop as the electronics.
  • 13Design for manufacture, bill of materials engineering, component sourcing and unit cost reduction.
  • 14Manufacturing documentation packages: bills of materials, assembly instructions, process and soldering recommendations, and test plans.
  • 15Bring-up and debug with logic analyzers, mixed-signal oscilloscopes from 500 MHz to 5 GHz, vector network and vector signal analyzers, and J-Link over JTAG and SWD.
  • 16Altera and Lattice FPGA programming with basic Verilog, at university coursework depth. That is stated as coursework on purpose rather than presented as production experience.

Record

Work behind this

Delivered work, stated as facts rather than claims. Programs and employers are named where naming them is what makes the record checkable. Clients are not.

R-01Sole engineer responsible for embedded hardware development and firmware at a Washington DC area sensor company for more than six years, through its growth from 5 people to 30+.
R-02Multiple generations of battery powered devices designed end to end: BLE wearables, LoRa wildfire sensor networks, and LTE plus GPS trackers.
R-03A combined GNSS L1 and LTE front end designed onto a shared RF path, with antenna matching at 1.575 GHz validated on a vector network analyzer for return loss and VSWR across both bands.
R-04Six consumer devices carried through embedded hardware development from concept to production, each with a full documentation package: bill of materials, assembly instructions and test plan.
R-05A consistent 12 percent production cost reduction through component selection and manufacturing optimization.
R-0620 to 60 percent materials savings through sourcing and negotiation with international manufacturers and distributors.
R-07In-house 3D printed prototype bodies that cut mechanical iteration time by 60 percent.
R-08A seven dollar per unit cost reduction found by playing digital audio from a microcontroller PWM output and deleting the audio decoder from the bill of materials.
R-09A modular digital sensor unit that cut the custom engineering effort needed to integrate into client and OEM systems.
R-10A battery powered Bluetooth sensor delivered inside a client size and performance envelope, hardware and bare-metal firmware both.

Questions

Questions technical buyers ask

Can you take a board from schematic through production, or only part of it?

Either. The full path is schematic, multilayer layout, prototype build, bring-up, debug, design for manufacture and the bill of materials the contract manufacturer works from. It is just as common to be brought in on one segment of that: a layout that has to be redone, an RF front end that will not match, a cost-reduction pass on a design that already ships.

Do you work alongside an existing engineering team?

Yes, and that is the usual shape. Hardware work almost always lands next to somebody who already owns the firmware, the mechanical design or the product requirements. The practical requirements are access to the schematic and layout source, a named technical counterpart, and agreement on who signs off on a revision before it goes to fabrication.

What does a first engagement usually look like?

A bounded piece of work with a deliverable a reviewer can judge. A design review of an existing board with written findings, an RF front end characterized on a vector network analyzer, or a cost-reduction analysis of a current bill of materials. That establishes whether the working relationship is right before either side commits to a full development schedule.

Other engineering capabilities

Radio ComplianceFirmware and Embedded LinuxLow Power and SolarConnected DevicesRobotics and ControlRF and SatelliteNetwork and SecurityInfrastructure and PlatformAgentic AI Systems

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Describe the system, the constraint and the deadline. An engineer answers.

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Tools and platforms we work with: Altium Designer. Nordic nRF52 and nRF9160. Nordic nRF51 and nRF52840, Cypress PSoC 4 and PSoC 5LP, ARM Cortex-M0 through M33, Microchip PIC18F4550. SolidWorks and in-house 3D printing. SEGGER J-Link over JTAG and SWD. Saleae and Digilent logic analyzers. Tektronix and Keysight mixed-signal oscilloscopes from 500 MHz to 5 GHz. Vector network and vector signal analyzers.